
IDT5V49EE904
EEPROM PROGRAMMABLE CLOCK GENERATOR
CLOCK SYNTHESIZER
IDT EEPROM PROGRAMMABLE CLOCK GENERATOR
19
IDT5V49EE904
REV P 092412
AC Timing Electrical Characteristics
(Spread Spectrum Generation = OFF)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
fIN
1
1.Practical lower frequency is determined by loop filter settings.
Input Frequency
Input frequency limit (CLKIN)
1
200
MHz
Input frequency limit (XIN/REF)
8
100
MHz
1 / t1
Output Frequency
Single ended clock output limit
0.001
200
MHz
fVCO
VCO Frequency
VCO operating frequency range
100
1300
MHz
fPFD
PFD Frequency
PFD operating frequency range
0.5 1
100
MHz
fBW
Loop Bandwidth
Based on loop filter resistor and capacitor
values
0.01
10
MHz
t2
Input Duty Cycle
Duty Cycle for input
40
60
%
t3
Output Duty Cycle
Measured at VDD/2, all outputs except
Reference output
45
55
%
Measured at VDD/2, Reference output
40
60
%
t4 2
2.A slew rate of 2.75V/ns or greater should be selected for output frequencies of 100MHz or higher.
Slew Rate, SLEW[1:0] = 00
Single-ended 3.3V LVCMOS output clock rise
and fall time, 20% to 80% of VDD
(Output Load = 5 pF)
3.5
V/ns
Slew Rate, SLEW[1:0] = 01
Single-ended 3.3V LVCMOS output clock rise
and fall time, 20% to 80% of VDD
(Output Load = 5 pF)
2.75
Slew Rate, SLEW[1:0] = 10
Single-ended 3.3V LVCMOS output clock rise
and fall time, 20% to 80% of VDD
(Output Load = 5 pF)
2
Slew Rate, SLEW[1:0] = 11
Single-ended 3.3V LVCMOS output clock rise
and fall time, 20% to 80% of VDD
(Output Load = 5 pF)
1.25
t5
Clock Jitter
Peak-to-peak period jitter, 1PLL, multiple
output frequencies switching
80
100
ps
Peak-to-peak period jitter, all 4 PLLs on3
3.Jitter measured with clock outputs of 27 MHz, 48 MHz, 24.576 MHz, 74.25 MHz and 25 MHz.
200
270
ps
t6
Output Skew
Skew between output to output on the same
bank
75
ps
t7 4
4.Includes loading the configuration bits from EEPROM to PLL registers. It does not include EEPROM programming/write time.
Lock Time
PLL lock time from power-up
10
20
ms
t8 5
5.Actual PLL lock time depends on the loop configuration.
Lock Time
PLL lock time from shutdown mode
2
ms